“As public safety becomes more and more important to the public, X-ray security inspection machines have become an essential security inspection equipment for the entry and exit of densely populated traffic places such as subways, bus stations, railways and customs. The FPGA-based X-ray radiation image acquisition and transmission system uses X-ray penetrating scanning imaging to quickly scan items in luggage and containers, and quickly identify prohibited items such as guns, explosives, and drugs to ensure public safety and society. peaceful. The X-ray security inspection machine is composed of a linear array X-ray image acquisition and transmission system and a host computer. This paper mainly studies the linear array X-ray image acquisition and transmission system, including the detection board,
As public safety becomes more and more important to the public, X-ray security inspection machines have become an essential security inspection equipment for the entry and exit of densely populated traffic places such as subways, bus stations, railways and customs. The FPGA-based X-ray radiation image acquisition and transmission system uses X-ray penetrating scanning imaging to quickly scan items in luggage and containers, and quickly identify prohibited items such as guns, explosives, and drugs to ensure public safety and society. peaceful. The X-ray security inspection machine is composed of a linear array X-ray image acquisition and transmission system and a host computer. This paper mainly studies the linear array X-ray image acquisition and transmission system, including the detection board, the acquisition board and the data board. The acquisition system adopts an array silicon photodiode detection sensor based on the combination of scintillation crystal and silicon photodiode technology.
1. Circuit design of X-ray detection system
The hardware block diagram of the X-ray acquisition and transmission system designed in this paper is shown in Figure 1. The hardware of the image acquisition and transmission system consists of three parts, the X-ray detector module, the FPGA data acquisition module and the Gigabit Ethernet RGMII data transmission module.
When the X-ray imaging scintillator crystal (CsI) is irradiated by X-rays, the X-rays are converted into visible light, and the scintillator is attached to the surface of the array silicon photodiode. The integrated amplifier amplifies, and the integral is converted into a voltage signal. The sensitivity of the amplifier is defined by the feedback capacitor of the integrating circuit. The sensitivity setting of each op amp can be individually controlled from the control port. After amplification, the signal is converted into a digital signal through A/D and sent to the FPGA chip of the acquisition board. The FPGA transmits the data to the data board through the LVDS transmission format.
When the acquisition board sends to the data board, it directly enters the data board FPGA through the port for signal processing. The signal processing unit processes the reordering of each pixel data, data correction, dark offset and sensitivity difference of pixel points, etc. Finally, the data board sends the image data to the system PC through the selected data interface (Gigabit Ethernet communication port), which is connected with the PC by the Gigabit Ethernet interface.
1.1 Linear array X-ray detector module
The linear array X-ray detector module consists of scintillation crystals (CsI) and silicon photodiodes. After the scintillator crystal layer is irradiated by X-rays, the X-rays are converted into visible light, the scintillator is attached to the surface of the array silicon photodiode, and the array silicon photodiode receives the visible light and converts it into a current signal. The photodiode array is a 64-channel array; the pixel pitch is 1.575 mm (the dual-energy detector channel plate is two 64-channel, a total of 128 channels), HE (high energy) and LE (low energy).
The scintillator X-ray detector Hamamatsu S11212 used in this paper is composed of 64 array diodes with a pixel pitch of 1.6 mm. The array diode adopts a back-illuminated design, which has higher sensitivity consistency and smaller pixel variation. The working temperature of the detector is -20℃~60℃, the wavelength λ of the response light is 340 nm~1100 nm, the average dark current is 5pA, and the maximum value is not more than 30pA.
1.2 FPGA data acquisition module
When the linear array X-ray detector detects the incident X-ray, the detector outputs a certain amount of charge Q, and the size of the charge Q is proportional to the intensity of the incident X-ray. If a voltage amplifier is used to amplify the signal, the input voltage V in = Q/(C1+C2), where C 1 is the capacitance between the detector output signal and the ground; C 2 is the sum of the amplifier’s input capacitance and distributed capacitance. The distributed capacitance C 2 between the semiconductor electrodes is affected by factors such as ambient temperature and external bias voltage, that is, if no effective measures are taken, even if the output charge Q of the detector is fixed, the input voltage V in will also change with C 2 . and change, so that V in and Q have a nonlinear relationship. Therefore, when the ordinary voltage amplifier outputs, the output voltage Vout is unstable, and the linear relationship between Vout and Q cannot be obtained. The charge-sensitive amplifier is equivalent to a capacitor negative feedback amplifier with a large open-loop gain. V out is not affected by the change of C 2 and is proportional to the Q value of the detector. The charge-sensitive amplifier is shown in Figure 2 below.
Amplifier input voltage VIN:
In the above formula, Q is the charge output by the detector after X-ray irradiation, K is the magnification, C 1 is the capacitance of the detector to the ground, C 2 is the amplifier input capacitance and distributed capacitance, and CF is the feedback capacitance.
When the above conditions are met, Vout is proportional to Q, and the proportionality factor is related to the feedback capacitance. In a charge-sensitive amplifier, the feedback capacitance does not change to a constant value, so the output voltage of the amplifier reflects the output charge of the detector. In order to maintain the consistency and uniformity between the amplified signals of the detector, the DT64 channel integrated charge sensitive amplifier is used to amplify the charge signals of multiple channels.
For the requirements of the linear array X-ray detection circuit ADC in the security inspection equipment, the ADC needs to have a high resolution, and the resolution determines the depth of the image data. In order to ensure the accuracy of the image data, an ADC with a resolution of more than 16 bits is usually used; It has enough adoption rate to complete the sampling within the output time of the amplifier signal. In this design, the output time of the charge-sensitive amplifier to amplify the 64-channel signals is 1 µs, so the sampling rate of the ADC (analog-to-digital converter) should be greater than 1 Mbit/s; considering various factors such as size, power consumption, working environment temperature, etc., the ADS8861 analog-to-digital converter designed by TI is selected, which is characterized by 16 bits, sampling rate of 1 Mbit/s, fully differential input, serial SAR analog-to-digital converter with line output.
1.3 Gigabit Ethernet RGM II Data Transmission Module
X-ray security inspection systems generally require multiple detection boards to be cascaded. One detection board has 128 detection points, which may be thousands of detection points for large-scale application environments. Transmission has high demands. Ideally, the formula for calculating the data rate is as follows:
Data rate =[lines / s]×[number of boards]×[128 pixels/board]×[16 bits/pixel]=[x Mbps](2) In the above formula,[Lines/s]is the integrator amplification per second , since the integrator duty cycle is 1 kHz, this results in 1 000 Lines/s. The minimum number of boards is 12 in the application environment of luggage security inspection in ordinary stations, subways, and airports, and the maximum number of boards required for the application environment of customs container security inspection is 80. Therefore, under ideal conditions, the minimum transmission rate is 24.576 MMbit/s, and the maximum transmission rate is 163.84 MMbit/s. This rate is only for the transmission of image data. In actual data transmission, in order to ensure the accuracy of the data, it is necessary to consider the package format of the data packet and related instructions, so it is greater than the theoretical transmission rate. In addition, for X-ray security inspection equipment, there will be a certain distance between the data transmission between the system and the PC host computer. In large application environments, a longer transmission distance is required. In order to ensure the stability and accuracy of data transmission, In this paper, Gigabit Ethernet is used for data transmission, and RTL8211D Gigabit network card chip is used.
In this paper, the Gigabit Ethernet data transmission is designed according to the network communication architecture of the TCP/IP protocol. The entire transmission structure includes the user layer, the transport layer, the network layer, the data link layer, and the physical layer. The overall design architecture of Gigabit Ethernet data transmission is shown in Figure 3.
The design part of the user logic part includes the user layer, the transport layer, and the network layer, which is mainly responsible for packaging and parsing the data in a specific format according to the user-defined data format and UDP and IP protocols. The Ethernet MAC controller constitutes the data link layer, controls the operation of sending and receiving frames, and is responsible for packetizing the data input by the upper layer in the MAC frame, and analyzing the data sent from the interface. The PHY chip forms the physical layer, and completes the encapsulation of the data packet through the control signal of the FPGA, and the timing control PHY chip converts the data into waves and transmits it to the PC host computer.
2. Control logic of X-ray detection system
2.1 Image acquisition timing control
The image acquisition sequence is mainly controlled by the FPGA to the detector’s integrator and ADC sampling sequence as shown in Figure 4. A linear array X-ray image sensor is installed on each acquisition board, and each board will evenly generate a current signal corresponding to the light intensity when it receives X-ray light. Amplify the current signal through a multi-channel integrator with controllable timing control gain, and let the ADC collect the amplified signal within a specified period. Here, a 16-bit ADC is used to sample the high and low energy integral values respectively.
2.2 Gigabit Ethernet Data Transmission
As shown in Figure 5, the four-bit data sent by the PHY chip is converted into 8-bit data by the DDIO module for subsequent modules to process. The receiving module parses and stores the data, and then extracts the valid fields of the data including CMD, OPE, DM ID, and SIZE. By judging the valid fields, you can know what function to perform. The data board will send the corresponding signal to the acquisition board so that the acquisition board can complete the corresponding function. After that, the obtained data is transmitted through CRC check and sent.
This paper proposes a linear array X image sensor acquisition and transmission system with FPGA as the control core, combined with image acquisition module and Gigabit Ethernet transmission module. According to different application scenarios, different numbers of X-ray detectors and acquisition boards can be selected, and the daisy-chain data transmission structure is adopted to cope with scenarios of different scales. The transmission of Gigabit Ethernet ensures the real-time, high-speed and accuracy of image data, and has good application value and market.